Distinguished Speakers

Sudhir Marwaha

Mr. S.K. Marwaha, presently Group Coordinator / Scientist-G, Ministry of Electronics and Information Technology (MeitY) is an Electronics and Communication Engineer from NSUT, Delhi and belongs to the 1989 batch of Indian Engineering Services.
In his working experience of over 33 years in the Government of India, Mr. S.K. Marwaha has handled policy matters pertaining to the Electronics and Information Technology Industry, including the National Policy on Electronics 2012 (NPE 2012), NPE 2019, the Phased Manufacturing Programme (PMP), fiscal and foreign trade policy matters pertaining to the electronics industry, preferential market access policy, development and implementation of Indian Conditional Access System (iCAS) and has been closely involved in facilitating the growth of the industry in the country.
He has been involved in the formulation of new Schemes, viz., Production Linked Incentive (PLI) Scheme for Large Scale Electronics Manufacturing, PLI Scheme for IT Hardware, Scheme for Promotion of Manufacturing of Electronic Components and Semiconductors (SPECS) and the Programme for Development of Semiconductors and Display Manufacturing Ecosystem in India, for promoting the growth of domestic electronics hardware manufacturing sector under the aegis of NPE 2019.
He is presently the Group Coordinator for “R&D in Communications, Convergence & Broadband Technologies” in MeitY, and Chief Technology Officer (CTO) of the India Semiconductor Mission. He continues to support the Industrial Promotion - Electronics Hardware Manufacturing Division of MeitY. read more

José M. de la Rosa

Title of Talk

AI-assisted Design Automation of Analog Circuits: an overview of the state of the art and challenges

Biography

José M. de la Rosa (Fellow, IEEE) received the M.S. degree in Physics in 1993 and the Ph.D. degree in Microelectronics in 2000, both from the University of Seville, Spain. Since 1993 he has been working at the Institute of Microelectronics of Seville (IMSE), which is its turn part of the Spanish Microelectronics Center (CNM) of the Spanish Council of Scientific Research (CSIC). He does his research at IMSE, where he served as vice-director from February 2018 to March 2023, and he is also a Full Professor at the Dept. of Electronics and Electromagnetism of the University of Seville. Since April 2023, he is the Director of the Office of International Projects of the University of Seville.
His main research interests are in the field of analog and mixed-signal integrated circuits, especially high-performance (sigma-delta) data converters, including analysis, behavioral modeling, design and design automation of such circuits. In these topics, Dr. de la Rosa has participated in a number of Spanish and European research and industrial projects, and has co-authored near 300 international publications, including journal and conference papers, book chapters and the books Systematic Design of CMOS Switched-Current Bandpass Sigma-Delta Modulators for Digital Communication Chips (Kluwer, 2002), CMOS Cascade Sigma-Delta Modulators for Sensors and Telecom: Error Analysis and Practical Design (Springer, 2006), Nanometer CMOS Sigma-Delta Modulators for Software Defined Radio (Springer, 2011) and CMOS Sigma-Delta Converters: Practical Design Guide (Wiley-IEEE Press, 2013, 2nd Edition, 2018). He is in the World’s Top 2% Scientists List from Stanford University (editions 2019, 2020 and 2022).
Dr. de la Rosa is an IEEE Fellow and member of the IEEE Circuits and Systems Society (CASS) and the IEEE Solid-State Circuits Society (SSCS). He served as a Distinguished Lecturer of IEEE-CASS (term 2017-2018), and as Chair of the Spain Chapter of IEEE-CASS during the term 2016-2017. He was at the front of the Editorial Board of IEEE Transactions on Circuits and Systems II: Express Briefs, where he served as Deputy Editor-in-Chief since 2016 to 2019, and as Editor-in-Chief (EiC) in the term 2020-2021. He is a member of the TechRxiv Editorial Advisory Board since 2022. He also served as Associate Editor for IEEE Transactions on Circuits and Systems I: Regular Papers, where he received the 2012-2013 Best Associate Editor Award and was Guest Editor for the Special Issue on the Custom Integrated Circuits Conference (CICC) in 2013 and 2014. He served as Guest Editor of the Special Issue of the IEEE J. on Emerging and Selected Topics in Circuits and Systems on Next-Generation Delta-Sigma Converters. He is a member of the Analog Signal Processing Technical Committee of IEEE-CASS and of the Steering Committee of IEEE MWSCAS. He has also been involved in the organizing and technical committees of diverse international conferences, among others IEEE ISCAS, IEEE MWSCAS, IEEE ICECS, IEEE LASCAS, IFIP/IEEE VLSI-SoC, DATE and ESSCIRC. He served as TPC chair of IEEE MWSCAS 2012, IEEE ICECS 2012, IEEE LASCAS 2015 and IEEE ISICAS (2018, 2019). He has been a member of the Executive Committee of the IEEE Spain Section (terms 2014-2015 and 2016-2017), where he served as Membership Development Officer during the term 2016-2017. He has been elected as Member-at-Large of the IEEE-CASS Board of Governors (BoG) for the 2023-2025 term, and appointed as Editor-in-Chief for IEEE TCAS-I in the term 2024-2025. Contact data and more details about the speaker available at http://www2.imse-cnm.csic.es/~jrosa/ read more

Abstract

This talk discusses the use of Artificial Intelligence (AI) to optimize the performance and automate the design of analog and mixed-signal integrated circuits. A survey of conventional and computational-intelligence design methods and Electronic Design Automation (EDA) tools is given as a motivation for the use of Artificial Neural Networks (ANNs) as optimization engines in the synthesis of analog integrated circuits. Main practical aspects, pros and cons, of AI-assisted design are presented in a tutorial style, including dataset generation, ANN modeling, training and optimization of network hyperparameters, and validation. Some examples and case studies are shown to demonstrate its application at different abstraction levels. At system level, ANNs are used in combination with behavioral simulation for the optimization of ADCs based on Sigma-Delta Modulators (ΣΔMs). At circuit level, SPICE-like simulation is combined with ANNs to automate transistor sizing and biasing of Operational Transconductance Amplifiers (OTAs).
As an application, an AI-assisted synthesis toolbox is presented, which includes a Graphical User Interface (GUI) to guide designers through all steps: from definition of specifications to verification of the obtained results. A comparison with other optimization methods – such as genetic algorithms, simulated annealing and gradient descent – is discussed, demonstrating that the AI-empowered methodologies yield to more efficient design solutions in terms of performance metrics and computational resources . read more

Manuel Delgado-Restituto

Biography

Manuel Delgado-Restituto received the Ph.D. degree in Electronic Physics (Honors) from the University of Seville, Spain, in 1996. Since then, he has been working with the Institute of Microelectronics of Seville (IMSE-Univ. of Sevilla) where he currently heads a research group on low-power medical microelectronics and works in the design of silicon and optoelectronic microsystems for understanding biological neural systems, the development of neural prostheses and brain-machine interfaces, the implementation of wireless body area network transceivers and the realization of RFID transponders with biomedical sensing capabilities.
Manuel served as an Associate Editor for different IEEE Publications (TCAS-I, TCAS-II, and TBioCAS) and as Editor-in-Chief for the IEEE JOURNAL on EMERGING AND SELECTED TOPICS IN CIRCUITS AND SYSTEMS (JETCAS). He has also served (or is serving) in the Organizing Committee of different international conferences, including his role as General Co-Chair for ISCAS 2020 and as Technical Program Co-Chair for ESSCIRC 2010, ICECS 2012, and ISCAS 2022. He was Vice President for Publications and President-Elect of the IEEE Circuits and Systems Society and during the period 2022-2023 served as President of this Society. read more

Francois Rivet

Biography

Dr. Francois Rivet, an Associate Professor at the Bordeaux Institute of Technology, has been a tenured faculty member since June 2010. With Master's and Ph.D. degrees from the University of Bordeaux, his expertise is in RFIC (Radio Frequency Integrated Circuits) design. Rivet founded the "Circuits and Systems" research team at the IMS Laboratory in 2014, driving significant advances in microelectronics. His work has led to 20 patents and numerous awards. Additionally, he plays an active role in the academic community, serving on various Technical Program Committees and Steering Committees such as IEEE RFIC as General Chair in 2025, IEEE ICECS, and IEEE LASCAS. Since 2024, he is a member of the Board of Governors of IEEE Circuits and Systems Society.

Shanthi Pavan

Biography

Shanthi Pavan obtained the B.Tech degree in Electronics and Communication Engineering from the Indian Institute of Technology, Madras in 1995 and the M.S. and Sc.D. degrees from Columbia University, New York, in 1997 and 1999, respectively. From 1997 to 2000, he was with Texas Instruments in Warren, New Jersey, where he worked on high-speed analog filters and data converters. From 2000 to June 2002, he worked on microwave ICs for data communication at Bigbear Networks in Sunnyvale, California. Since July 2002, he has been with the Indian Institute of Technology-Madras, where he is now the NT Alexander Institute Chair Professor of Electrical Engineering. His research interests are in the areas of high-speed analog circuit design and signal processing.
Dr. Pavan is the recipient of numerous prestigious awards, including the Shanti Swarup Bhatnagar Award in Engineering Sciences (2012), IEEE Circuits and Systems Society Darlington Best Paper Award (2009), and the Swarnajayanthi Fellowship (2010, from the Government of India). He also received the Young Faculty Recognition Award from IIT Madras (2009), the Technomentor Award from the India Semiconductor Association (2010), and the Young Engineer Award from the Indian National Academy of Engineering (2006).
Dr. Pavan has served as Editor-in-Chief of the IEEE Transactions on Circuits and Systems: Part I - Regular Papers (2014-2015), and has been on the editorial board of IEEE Transactions on Circuits and Systems Part II - Express Briefs (2006-2007). He has also served as a Distinguished Lecturer of the IEEE Solid-State Circuits Society and was on the technical program committee of the International Solid-State Circuits Conference (ISSCC). He is a fellow of the Indian National Academy of Engineering (INAE), the Indian National Science Academy (INSA), and the Institute of Electrical and Electronics Engineers (IEEE). read more

Sunny Malhotra

Biography

To be decided ..

Nitin Kishore

Biography

To be decided ..

Amar Punhani

Title of Talk

Future Of Automotive Mobility-Advanced Vehicle Architectures

Biography

Amardeep Punhani is a Senior Director of R&D, MME Digital IP at NXP India and has 24 years of experience in the VLSI industry. He has been engaged with Automotive SoC / IP development in NXP for the past 16 years, in various roles including as SoC Chip lead, Global Digital IP Manager, and now as a Sr. Director for IP design in BL-MME.
He has been involved in the development of multiple SoCs meant for Automotive and Edge Processing System solutions. He and his team have been working on IP development across multiple domains including Automotive Safety, Radar and imaging for ADAS, RISC-V, AI-ML, Serial protocols, Infrastructure IPs, Security solutions and many others. Before NXP, he also worked in various capacities with Agilent Technologies, NEC Australia in Melbourne, and Altima Corporation in Japan. He has done his BTech from IIT Roorkee and Masters from IIM Lucknow.

Preet Yadav

Biography

To be decided ..

Yann DEVAL

Biography

To be decided ..

Ms.S.Usha

Biography

To be decided ..

Harini Kandadai

Biography

To be decided ..